The present invention generally relates to semiconductor devices and more particularly to a method of manufacturing a semiconductor device having a silicon carbide layer.
Silicon carbide is a material having an excellent stability against heat and radiation. Thus, a semiconductor device constructed on a silicon carbide layer is expected to play a major role in electronic instruments to be used in a high temperature and highly radioactive environment such as space vehicles, satellites or nuclear reactors.
Conventionally, a semiconductor device constructed on a silicon carbide layer has a problem in that the formation of an oxide layer on the surface of the silicon carbide layer is difficult because of the slow oxidation rate of silicon carbide. Usually, the oxidation rate of silicon carbide is less than one-tenth that of silicon. Because of this, the technique to of forming a device isolation structure by thermal oxidation, which is well established in the case of the device constructed on silicon, is not applicable and the semiconductor device constructed on a silicon carbide layer has to employ a complex mesa structure in order to achieve device isolation.
FIGS. 1(A)-(C) show a typical prior art process for manufacturing a metal-oxide-silicon field effect transistor (MOSFET) on a silicon carbide layer. Referring to FIG. 1(A), a silicon carbide layer 12 is grown on a silicon substrate 11 by chemical vapor deposition, and after deposition of aluminum layer 13 on the silicon carbide layer 12 and a subsequent patterning for exposing the silicon carbide layer 12 except for a device region in which the semiconductor device is to be formed, the structure is etched in a nitrogen trifluoride (NF.sub.3) etching gas and structure shown in FIG. 1(B) is obtained. After the removal of remaining aluminum layer 13, a MOS structure comprising a gate oxide film 14, a gate electrode 15, source and drain regions 16 and 17, and source and drain electrodes 18 are formed by a well known process. Further, an aluminum interconnection 20 is provided on the substrate 11 so as to make contact with the source and drain electrodes 18 and a MOSFET shown in FIG. 1(C) is obtained.
The MOSFET thus obtained, however, has a problem in that the manufacturing process is complex as it involves the step of forming the mesa structure. Further, the integration density is limited because of the separation between the mesa structures. Associated with use of the mesa structure, there arises a further problem in that a leakage current flowing through a side wall of the mesa structure is increased because of minute projections and depressions formed on the side wall at the time of etching. It is believed that such of impurities on the side wall of the mesa structure and thus provide a path for the leakage current. Furthermore, the steep side wall of the mesa structure tends to cause a disconnection of the metal interconnection 20 particularly at a part 19 along the side wall where the interconnection is thin. The disconnection of the metal interconnection 20 is facilitated further by the minute projections and depressions of the side wall.